IRVS VLSI IDEA INNOVATORS

IRVS VLSI IDEA INNOVATORS
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Tuesday, January 25, 2011

Resource Sharing

• Some synthesis tools automatically perform a limited amount of resource sharing ( for arithmetic expressions that are mutually exclusive).

• Consider the code:

ADDSEL: process( sel, a ,b,c,d)
begin
if (sel=‘1’ ) then
y<= a + b ;
else
y<= c + d ;
end if ;
end process ADDSEL ;




Simulation vs. Synthesis

• Some simulation constructs are not supported by synthesis tools.

– e.g. wait statements.

• Synthesis tools ignore initial values.

• Care should be taken so that simulation- synthesis mismatch does not occur.

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