IRVS VLSI IDEA INNOVATORS

IRVS VLSI IDEA INNOVATORS
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Thursday, December 16, 2010

SIMULATION PROCESS

BASIC DEFINITIONS

• EVENT
A CHANGE ON COMPONENT OUTPUT THAT WILL BE PROPAGATED

• TRANSACTION
A CHANGE ON COMPONENT INPUT THAT DOES NOT PROPAGATE

• SCHEDULING
FUTURE EVENTS GENERATED BY EVALUATION OF A PROCESS

• EVALUATION
CALCULATING THE OUTPUTS OF COMPONENTS BASED ON INPUTS AND CURRENT STATE



Simulation executes as follows:

At t=0 , all gate outputs are set to an unknown value
Two queues are set up



When Simulation time is incremented :

• Signal is updated.

• All processes sensitive to that signal are placed on the process execution queue.

• Each resumed process is executed until it suspends.

• Effects of the logic changes that have occurred as a result of process execution are evaluated.

• Simulation time is set to the next event in queue or halted if simulation time gets exhausted.



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