IRVS VLSI IDEA INNOVATORS

IRVS VLSI IDEA INNOVATORS
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Thursday, April 28, 2011

High-power fiber lasers for industry and defens

Power Scaling of Broadband Single-Mode Fiber Lasers

Four primary factors limit the power scaling of broadband single-mode fiber lasers:

• pump brightness

• nonlinear effects in the fiber, particularly SRS

• excessive heat generation in the final gain stage

• loss of fundamental mode power to higher-order modes

Each factor limits power scaling in the power amplifier stage (the final gain stage). Note that stimulated Brillouin scattering (SBS) is a limiting factor for spectrally narrow fiber lasers, but not for broadband fiber lasers, that is, those with a spectral bandwidth of several nanometers. SRS also limits the length of the output fiber (note that the SRS threshold is reduced as the fiber length increases and as the power density in the fiber core increases). Although each of these obstacles limits power scaling independently, they are also interrelated in that methods to reduce or avoid one may increase the effects of another. For example, one might develop or purchase brighter pump diodes to overcome the pump brightness issue, only to find that doing so increases the thermal problems in pump coupling or in the gain fiber. To reduce the heat generated per unit length, the gain fiber might be lengthened, but then the SRS threshold will be reduced. Due to the interdependent nature of these limiting factors, one must maintain a holistic approach to power-scaling strategies, taking into account all four factors in determining how to proceed.



Consider the power amplifier shown in Fig. 18.5. The gain fiber has a 20-µm core diameter and a 400-µm cladding diameter. Using industry-standard pump combiners, which have six pump legs and a central signal fiber, there are six 200-µm, 0.22-NA pump ports. If one were to pump from both ends of the gain fiber, 12 such pump ports would be available. If fiber-coupled pumps were limited to 350 W for this fiber size, a total of 12 x 350 W, or 4.2 kW, of pump power would be available. If the input power to this power amplifier stage were 500 W, and the optical-to-optical efficiency were 75 percent, including all losses, the pump-limited output power would be 0.75 x 4.2 kW + 0.5 kW = 3.65 kW. To increase pump power to the gain fiber, one could argue that side couplers might be used to distribute more pump power along the gain fiber. However, at these power levels and fiber core size, the required lengthening of the gain fiber would result in a reduction of the SRS threshold. To increase the SRS threshold, the core size might be increased, resulting in reduced core power density and increased core-to-cladding ratio. This would, in turn, improve pump absorption, thus reducing fiber length. However, a reduced fiber length results in increased heat per unit length, and, as we have seen from Chap. 15, it is very difficult to obtain single-mode output with a fiber core larger than about 25 µm. Thus, the SRS limitation generally disallows distributed pumping and limits us to pumping only from both ends of the gain fiber.

Suppose now that our pump-brightness-limited amplifier is scaled by the availability of new, higher-brightness pumps with twice the power from the same size fibers. In theory, we could now scale the amplifier shown in Fig. 18.5 to 6.8 kW, or nearly double the output power. However, at this power level, we may exceed the SRS threshold, requiring a further shortening of the gain fiber. In order to absorb all this pump power in a very short gain fiber, the gain fiber's Yb concentration might be increased. However, at some point, doing so will exceed the thermal threshold due to excessive heat generated per fiber unit length, resulting in burning or degradation of the polymer fiber coatings. These examples show how the interrelated factors of pump brightness, SRS, heat load, and fundamental-mode guiding all limit the output power of broadband fiber lasers. Note that in addition to overcoming these primary factors, certain other fiber-based capabilities are prerequisite, including low-loss fibers and splices, fibers and gain stages designed to inhibit photo-darkening, and low-index polymer fiber coatings capable of handling high pump power levels.

A novel approach to overcoming the four primary obstacles to power scaling broadband single-mode fiber lasers involves using fiber lasers, rather than pump diodes, to resonantly pump the final high-power amplifier. The pump brightness limitation was recently overcome by the development of single-mode Yb fiber lasers at 1018 nm with power output of up to 270 W. The schematic for a 10-kW single-mode fiber laser using these fiber pump sources is shown in Fig.



The initial fiber master oscillator is diode laser pumped at 975 nm at the peak of the Yb absorption. The power amplifier is pumped at 1018 nm on the red shoulder of the 975-nm absorption peak (Fig. 18.7). Although this pump wavelength results in a lower absorption cross section, the brightness of the pumps is increased by more than two orders of magnitude, from about 30-W multimode diodes in 105-µm core (which was the limit for single-emitter fiber-coupled diode packages at the time of development) to 270-W single-mode fiber lasers. This increase allows for reduced cladding size, thus increasing the core-clad ratio and thereby compensating for the lower Yb core absorption cross-section. In addition, the scheme is synergistic in that it addresses the heat generation issue. The quantum defect when pumping at 1018 nm and emitting at 1070 nm is less than 5 percent, versus approximately 9 percent for 975-nm pumping. Therefore, about half as much heat overall is generated in the gain fiber. The resonant pumping scheme has also been reported to improve mode guidance for the fundamental mode versus high-order modes. Single-mode output power greater than 10 kW has been achieved to date using this resonant fiber laser pumping scheme. It is speculated that even 20 to 30 kW single mode may be feasible, with Ram and thermal issues considered to be the ultimate limitations.



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Wednesday, April 27, 2011

Deliver the lowest distortion and noise in a low-power, wideband, ADC interface

Considerable progress has been made recently into pushing wideband fully differential amplifiers into the >100dBc SFDR (spur free dynamic range) area with <1nV input referred noise. Wringing the last few dB out of an interface to an ADC can benefit from some simple input side circuit solutions that give both noise and distortion improvements.

The FDA can give a very clean differential I/O gain stage, but then that needs to be carefully interfaced to the ADC to control its output broadband noise spectrum and higher frequency distortion terms into the ADC. Some simple SNR and SFDR combination equations will be presented to explain the FFT results for the combined input interface, filter, and ADC.

This discussion will step through a simple input-side interface to the FDA that offers numerous benefits for an AC coupled, communications oriented, ADC interface requirement. It will then describe output-side interstage-coupling options to translate the FDA output signal to the ADC with a controlled noise power bandwidth. Design equations and tested results will be shown using the recently introduced 4GHz ISL55210 FDA and the low power 12-bit, 500-MSPS ISLA112P50 ADC.

With 12 and 14-bit ADCs moving into the >200MSPS region, Nyquist bandwidths exceeding 150 MHz are showing up in modern system designs. While the ADCs do an excellent job of describing their achievable SFDR and SNR under a wide range of clock and input frequency conditions, those tests are often very narrowband assuming an excellent (expensive) pre-filter to the ADC.

Moving from this characterization condition of lab signal sources, and narrowband filters, to systems requiring a broadband final stage with gain requires a careful consideration of the expected FFT degradation. Even with a perfect input signal to this final stage, the spectrum to the ADC will experience some degradation and added noise in passing through even the best amplifiers.

The final amplifier stage solution to the ADC needs to consider the following issues:

1. Signal gain and flatness through the desired frequency band.

2. Convert single to differential if needed.

3. Map different common mode operating voltages from the input to the ADC.

4. Maintain extremely low harmonic distortion.

5. Introduce some wideband noise power limiting filter between the amplifier and the ADC – and possibly a High pass low end cutoff as well.

6. Present a reasonably low source impedance to the ADC – often a final capacitive element to ground is desirable to shunt sampling glitches off to a low impedance path.

7. Include the ADC input impedance, common mode operating voltage, and any common mode current requirements into the design.

This is a lot to ask in one stage under all imaginable signal path conditions. It is best to break the design issues down into more manageable pieces. Much work has been done to support single-ended to differential designs with DC coupling using FDAs. While possible, most efforts have gotten bogged down into HD2 issues that come with the DC coupled single to differential requirement.

By far the highest SFDR solutions can be delivered if we either come in differential (as is becoming more common with the newer mixer outputs) or convert single=ended to differential using a low cost input transformer. Using an input transformer (or just two blocking capacitors from a differential source) assumes an AC-coupled signal path is acceptable. This may not always be the case but does cover a large range of modern communications digitizer requirements.


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Thursday, April 21, 2011

Xilinx 7 Series FPGAs

Introduction to Xilinx 7 Series FPGAs

The Xilinx 7 series comprises three new FPGA families that address the complete range of system requirements, from low-cost, small-form-factor, cost-sensitive, high-volume applications to the most demanding high-performance applications that need ultra-high-end connectivity bandwidth, logic capacity and signal-processing capability. The 7 series FPGAs are the programmable silicon foundation for Xilinx Targeted Design Platforms, which enable designers to focus on innovation from the outset of their development cycle.

The 7 series FPGAs include:

* Artix-7 Family: Optimized for lowest cost and power with small-form-factor packaging for the highest-volume applications.

* Kintex-7 Family: Optimized for best price/performance with a 2x improvement over previous-generation devices, enabling a new class of FPGAs.

* Virtex-7 Family: Optimized for highest system performance and 2x improvement in capacity over previous-generation FPGAs, to satisfy the insatiable demand for higher bandwidth and higher performance.

7 Series Families Comparison

Wednesday, April 20, 2011

Power Line Communication integrates EVs with the Smart Grid

Electric vehicles are gaining momentum on a worldwide basis. A compatible charging infrastructure and communication between the vehicle and the "charging spots" is required for ease of use on the end user side. The already established Power Line Communication (PLC) standard in the Smart Power Grid area offers a robust and long term available setup.

Electric cars, with a history ranging back more than hundred years, are experiencing a renaissance. The rise in fuel costs, improved battery technologies and government incentives are just some of the factors that make electric vehicles (EVs) a great choice especially for individual mobility in the growing megacities.

China shows an impressive rollout plan, but also European countries are driving this trend. Germany has a plan for 1 million EVs by 2020; France is moving ahead even faster with massive government funding for a plan to install 1 million EV charging spots by 2015 and 2 million EVs by 2020. The increased distribution of EVs also offers new business opportunities for utility providers creating new income sources and also allows grid stabilization (cut of peak loads) via the EV's battery as buffer feeding energy back into the power grid.

The charging of these EV batteries can be done in different ways. The majority of the charging cycles will certainly happen at home or at work (estimated at 80%), but public charging spots are required as well to ensure an adequate supply grid.

There are different possibilities for charging. The most basic one is to use a single phase power supply of 230V and up to 32A AC via a typical 3 kW on-board-charger, but also via a 3 phase 400V with up to 63A AC (typical 20 kW charger). Charging with these currents is typically taking hours and is combined with parking times of the car (home, work, shopping). A closer equivalent of a gas station for conventional combustion engine cars is the DC charging (or also called fast charging) ranging up to 100 kW power, but this has to be possible without damaging the battery pack.

Ease of use

All of these charging situations in public drive the need for user interaction at the charging spot. For advanced features, the identification of the vehicle itself at the charging spot is required, which is typically realized via Power Line Communication (PLC). In these cases, a variety of data, including vehicle identification, current battery status, maximum allowed charge current and number of phases, charging times (e.g. delayed charging start), and overall 'charged' electricity amount with associated costs are exchanged. The identification of the car in the network opens up a cross utility provider usage of the electricity, similar like roaming in a mobile phone network.

However, this brings up one of the most important requirements: every car has to work with every charging spot. So the standardization does not only apply to the used plug standard, but also to the method of communication of the car with the charging infrastructure.

The PLC is a well suited choice as the connection cable is needed anyway for charging (excluding the possibility for inductive charging, which is lower power but under consideration). PLC is robust and does not normally require any additional user interaction.

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Monday, April 18, 2011

Magnetic graphene harnesses Kondo effect

PORTLAND, Ore.—Pure sheets of carbon—graphene—can be made magnetic by introducing patterns of vacancies into their crystalline lattice, according to researchers at the University of Maryland. By controlling the magnetic properties of graphene semiconductors with vacancy-doping, the researchers hope to enable the pure carbon material to tackle new applications as magnetic sensors and random access memories (MRAMs).

Semiconductors are usually made magnetic by doping with a metallic material such as iron or cobalt, but the University of Maryland team, led by professor Michael Fuhrer, claim that just introducing empty spaces into graphene's otherwise perfect hexagonal pattern—called vacancies—can dope the material for magnetism. Others have used surface treatments to make graphene magnetic, but the new method is said to work better by virtue of eliminating the need for any other material except carbon.

Fuhrer's Lab was one of the first to characterize the carrier mobility in graphene as being more than 10-times higher than silicon (15,000- compared to 1,400-cm2/Vs, square centimeters per volt second). Now the team claims that their newest characterization attempts for the first time explain how magnetic properties can also be introduced into graphene—namely by adding vacancy defects to its crystalline lattice.

Semiconductor defects are usually caused by doping, which in this case are vacancies instead of a different material, each of which acts like a nanoscale magnet with its own "moment." The researchers demonstrated that these vacancy defects strongly interacted with any electrical currents in the material, potentially making is semiconducting properties tunable by virtue of the Kondo effect. The researchers measured the temperature of the Kondo effect in graphene with vacancies and found it to be about the same as in metals with electron densities much higher that un-doped graphene—about 90 degrees Kelvin.



Next the researchers are attempting to arrange the vacancies in a pattern that could exhibit ferromagnetism by forcing all the magnetic moments in a domain of vacancies to line up by virtue of the Kondo effect, potentially allowing them to be electrically switched to make pure carbon magnetic memories and sensors.

Funding was provided by the National Science Foundation and the Office of Naval Research.

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