Complexity

• Complexity here means the number of transistors (or the amount of logic and/or memory) per given amount of area, plus the associated interconnect capability.

• Current Array-Based and Cell-Based chips accommodate as many as 20,000,000 usable logic gates on a single die.

• Array-Based designs -especially in a Channel-Free Array technology - are capable of realizing functions that represent actual system building blocks and incorporate system memory functions on the same die.

• The Array-Based memories do tend to be about 5 times less dense than Cell-Based memories because they are constructed out of the gates on the master slice. And full custom memories would provide much higher densities than do Array-Based memories.

• But in fact many designers who are using the Array-Based technologies to get fast turn around tend to be using very small “scratch pad” or “cache” types of memories which fit very well into the ASIC concept.

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