IRVS VLSI IDEA INNOVATORS

IRVS VLSI IDEA INNOVATORS
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Tuesday, September 14, 2010

Timing Simulation

• One most important change the design undergoes is after the implementation.

• The modules in the design now may be physically placed apart from each other.

• This factor introduces the delay aspect in the signal propagation.

• Many synchronous circuits will fail if the timing aspects are ignored, even though they appear to be functionally perfect!

• Hence a simulation is necessary again to test the timing behaviour of the design.

• This provides the designer with a better view of the design functionality.

• In fact the real-world behaviour of the device can be very accurately studied by the simulation with timing aspects.


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