IRVS VLSI IDEA INNOVATORS

IRVS VLSI IDEA INNOVATORS
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Friday, January 21, 2011

Testbench



Waveforms



Testbench : Using assert…report



Waveforms



Error Report



SUMMARY

• A Test bench thus is an effective built- in tool for verifying VHDL designs.

• Troubleshooting becomes easier and faster because of the ASSERT…REPORT clause.

• Automation of verification is possible because of the seamless integration of language elements.

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