• Abstraction defines how much detail about the design is specified in a particular description.
• Four levels are:
– Layout level
– Logic level
– Register Transfer level
– Behavioral level
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi3lFoQPkid9PtEAh6JFJMaxuNsWpnP3xawcai95AFcpackBLkZ7qXutGwwDjCvHsNCWXpQDTakQBYF3cWPnW663ZJK20bMs1qefoqk4zARNsU6kEoTkxiN7VXmxO11a-XkZ1MW-MDiGYSq/s320/level+of+abstract.png)
Layout Level
• This is the lowest level and describes the CMOS layout level design on silicon.
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjpf3iusgm1dbrbnlkUOU3UcUdJkx47FsZxrWTzQP4P2gs7_X0aLil-PAsQQVZ97zgz6-k3tc6MxJae_yPMrV7zldyf3UTvW_jGfknmbmHSfHI0EC0oXWRQkBeq5wjMBBMTE8BI75esDT7n/s320/layout+level.png)
Logic Level
• Design has information about
– Function
– Architecture
– Technology
– Detailed timings
• Layout information and analog effects are ignored.
Register Transfer Level
• Using HDL every register in the design and the logic in between is defined.
• Design contains:
– Architecture information.
– No details of technology.
– No specification of absolute timing delays.
Behavioral Level
• Describing function of a design using HDL without specifying the architecture of registers
• Contains timing information required to represent a function
information shared by www.irvs.info