Deliver the lowest distortion and noise in a low-power, wideband, ADC interface

Considerable progress has been made recently into pushing wideband fully differential amplifiers into the >100dBc SFDR (spur free dynamic range) area with <1nV input referred noise. Wringing the last few dB out of an interface to an ADC can benefit from some simple input side circuit solutions that give both noise and distortion improvements.

The FDA can give a very clean differential I/O gain stage, but then that needs to be carefully interfaced to the ADC to control its output broadband noise spectrum and higher frequency distortion terms into the ADC. Some simple SNR and SFDR combination equations will be presented to explain the FFT results for the combined input interface, filter, and ADC.

This discussion will step through a simple input-side interface to the FDA that offers numerous benefits for an AC coupled, communications oriented, ADC interface requirement. It will then describe output-side interstage-coupling options to translate the FDA output signal to the ADC with a controlled noise power bandwidth. Design equations and tested results will be shown using the recently introduced 4GHz ISL55210 FDA and the low power 12-bit, 500-MSPS ISLA112P50 ADC.

With 12 and 14-bit ADCs moving into the >200MSPS region, Nyquist bandwidths exceeding 150 MHz are showing up in modern system designs. While the ADCs do an excellent job of describing their achievable SFDR and SNR under a wide range of clock and input frequency conditions, those tests are often very narrowband assuming an excellent (expensive) pre-filter to the ADC.

Moving from this characterization condition of lab signal sources, and narrowband filters, to systems requiring a broadband final stage with gain requires a careful consideration of the expected FFT degradation. Even with a perfect input signal to this final stage, the spectrum to the ADC will experience some degradation and added noise in passing through even the best amplifiers.

The final amplifier stage solution to the ADC needs to consider the following issues:

1. Signal gain and flatness through the desired frequency band.

2. Convert single to differential if needed.

3. Map different common mode operating voltages from the input to the ADC.

4. Maintain extremely low harmonic distortion.

5. Introduce some wideband noise power limiting filter between the amplifier and the ADC – and possibly a High pass low end cutoff as well.

6. Present a reasonably low source impedance to the ADC – often a final capacitive element to ground is desirable to shunt sampling glitches off to a low impedance path.

7. Include the ADC input impedance, common mode operating voltage, and any common mode current requirements into the design.

This is a lot to ask in one stage under all imaginable signal path conditions. It is best to break the design issues down into more manageable pieces. Much work has been done to support single-ended to differential designs with DC coupling using FDAs. While possible, most efforts have gotten bogged down into HD2 issues that come with the DC coupled single to differential requirement.

By far the highest SFDR solutions can be delivered if we either come in differential (as is becoming more common with the newer mixer outputs) or convert single=ended to differential using a low cost input transformer. Using an input transformer (or just two blocking capacitors from a differential source) assumes an AC-coupled signal path is acceptable. This may not always be the case but does cover a large range of modern communications digitizer requirements.


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