Delays in VHDL

• In VHDL, there are three types of delay that are encountered.

– Inertial delay
– Transport delay
– Delta delay

Inertial Delay

• Inertial delay is the default in VHDL.

• Behaves similarly to the actual device.

• Output signal of the device has inertia, which must be overcome for the signal to change value.

• The inertial delay model is by far the most commonly used in all currently available simulators.



Transport Delay

• It represents a wire delay in which any pulse, no matter how small, is propagated to the output signal delayed by the delay value specified.

• Especially useful for modeling delay line devices, wire delays on a PCB, and path delays on an ASIC.



Delta delay

• These are used since the PC that processes and simulates a concurrent phenomenon is basically a sequential machine.

• The simulation program mimics concurrency by scheduling events in some order.

• Simulation deltas are used to order some types of events during a simulation.

• Specifically, zero delay events must be ordered to produce consistent results.









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