Ultra-low power microcontrollers for compact wireless devices

This paper describes design strategies for ultra-low power microcontrollers for use in various existing and emerging wireless applications. Emphasis is placed on practical techniques to reduce both active and standby mode power. Design examples draw from experience with the ARM Cortex-M3 core.

In particular an 8.75mm3 sensor system is detailed that includes a low voltage ARM Cortex-M3 microcontroller, custom 3.3fW leakage per bit SRAM, integrated solar cells, a thin-film battery, and an integrated power management unit. The 7.7µW system consumes only 550pW in a functional sleep state between sensor measurements and harvests energy from the solar cells to enable nearly-perpetual operation.

A dramatic paradigm shift is underway in the chip industry. For decades, the industry has bee n chasing gigahertz; companies have continued to sell chips by consistently making them faster. However, the industry has very quickly shifted its focus away from speed and toward energy efficiency. The chip industry finds itself today on the verge of a new generation of compact wireless devices embedded in all everyday objects, from smart credit cards to smart clothing to smart homes and buildings. With tens or hundreds of these smart objects for each person, the costs of daily recharging (or even weekly, monthly, or yearly recharging) are prohibitively high. Energy efficiency has therefore become the chief concern.

Microcontrollers sit at the heart of this new generation of compact wireless devices. The key challenge for microcontroller users is achieving unprecedented energy efficiency while also meeting the functional and performance requirements of increasingly feature-rich products. The ARM Cortex-M architectures have offered a platform with an excellent blend of energy- efficiency and performance. However, the architecture is only one piece of a complex puzzle. In this paper, we look at a range of chip-level and system-level considerations for the users of energy-efficient microcontrollers.

We begin with a short summary of the sources of energy consumption in a typical microcontroller. We continue with a peek inside an extremely energy-efficient microcontroller. We use an implementation of the Cortex-M3 architecture called Archimedes to illustrate the energy saving techniques available in cutting-edge microcontrollers. This particular implementation is the world’s most energy-efficient commercial-grade microcontroller and uses energy efficiency techniques that will sit at the heart of next-generation microcontrollers.

An understanding of this microcontroller’s internal functionality is useful for readers trying to understand energy-efficiency trade-offs in a microcontroller. We then take a system-level view and discuss the integration of an energy-efficient microcontroller with other off-chip components. We again use the aforementioned Cortex-M3 implementation as an example of system-level integration issues.

Readers of this paper should take away the following key points:

* Sleep mode energy is extremely important in microcontrollers and can easily dominate a system’s energy budget without careful management.

* Next-generation aggressively voltage-scaled microcontrollers with will offer dramatic active mode energy reductions over today’s microcontrollers.

* The availability of functional sleep modes will allow microcontroller users to maximize energy efficiency.

* An energy-efficient microcontroller and energy-efficient code can easily be defeated by poor system or board-level design. Highly-integrated microcontrollers can help address this problem.

Energy components in a microcontroller

Before examining the Archimedes microcontroller, it is important to consider the sources of energy consumption in a typical device. A microcontroller’s energy budget can generally be broken into three components: 1) active mode energy, 2) sleep mode energy, and 3) wake/sleep transition energy (i.e., the energy consumed when moving between sleep and active modes), as shown in figure



Fig 1: Sources of energy consumption in a microcontroller.

In a typical wireless sensing application like the temperature monitoring of a pharmaceutical product, an interrupt (e.g., a timer expiration) wakes up the microcontroller. After any sleeping components (e.g., memories, regulators, clock generators, etc.) have been woken, the chip does some computations and sensor measurements, saves the sensor data in local memory, and occasionally communicates the data over a wireless interface. Once these tasks are complete, the microcontroller returns to sleep mode until the next interrupt arrives.

The importance of each component of energy consumption varies from application to application. Figure 2 shows the relative contribution of each component for a typical commercial low power microcontroller with active mode demands of 200µA/MHz and sleep mode current of 500nA with RAM/register retention and a low power oscillator running. It is assumed that the microcontroller cycles between a 100ms active mode with clock frequency of 1MHz and a sleep mode of variable length.

It is further assumed that the microcontroller takes 1ms to transition between sleep and active modes and that power ramps at a steady rate from the sleep mode value to the active mode value (an overly simplistic assumption that is used for illustrative purposes).

Active mode energy consumption is the dominant source of energy consumption for short sleep times. However, for sleep times of 50s or more, sleep mode energy consumption actually dominates the total energy budget, a key takeaway for this paper. Though instantaneous power is significantly lower in sleep mode than in active mode, considerably more time is spent in sleep mode, and the total energy consumed in sleep mode soon dominates the total.

Sleep times of 50s or more are quite common in many wireless sensing applications like temperature logging for pharmaceuticals, temperature/humidity monitoring in homes/buildings, and a range of other data logging applications. Note that wake/sleep transitions can be a considerable energy component in certain systems but were a negligible energy component in this system.




Fig 2: Relative contribution of each source of energy consumption for variable sleep time with a fixed active period of 100ms.

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Designing with core-based high-density FPGAs

One engineer's adventures designing with microprocessor-based FPGAs.

Modern field programmable gate arrays (FPGAs) are great for a wide range of high-speed, complex signal processing but can be difficult to interface to external systems. Microprocessors are great for interfacing to other systems, especially when equipped with Ethernet for communications, but don't offer the same levels of performance.

Until recently, designers either had to work around the weak spots of the chosen device or combine the two devices; the latter approach presents new difficulties when the data rate between the signal processing and general processor is significant. Enter FPGA devices with built-in microprocessors, combining modern 32-bit microcontrollers and Ethernet media access controllers (MACs) with FPGA resources.

This article presents my experience with designing a nontrivial multiprocessor system, using three networked Xilinx Virtex-4FX-based controllers.

Problem and solution

The system being developed by my client was a high-powered, pulsed laser for a military application. Unlike laser pointers, which are continuous wave (CW) lasers, this system consists of four pulsed lasers, using a technique called Q-switching to emit a series of regularly-spaced laser pulses; the output of these four lasers are ultimately combined optically for the final output.1

So, in addition to general housekeeping, the client identified a need early on for a number of high-speed photodiodes to monitor various aspects of the generated laser pulses. Ultimately, this evolved into an eight-channel pulse detection and analysis system operating at 200 million samples per second (Msps) for each channel. Clearly, no embedded processor system was going to be able to handle that throughput, so an FPGA-based solution was envisioned.

At the same time, other requirements, such as a relatively large number of sensors (more than 200), a good number of actuators, and unique command and telemetry interface with an external host system for overall control and monitoring, argued strongly for a microprocessor-based solution.

The initial thought was to combine an FPGA with a microprocessor, but because it appeared the interface between the two would, in itself, provide a challenge, I decided to investigate the then-new Virtex-4FX devices (this was in the fall of 2005). In addition to the high-performance logic and memory resources expected in a modern FPGA, these devices incorporate several "hard IP" resources, specifically PowerPC 32-bit microprocessors and Ethernet MACs.

These hard IP (IP stands originally for intellectual property but is also used to identify a module that may be incorporated into an FPGA design, similar to a peripheral chip in a microprocessor board of old) augmented by a wide range of peripheral IP (such as interrupt controllers, serial ports, serial peripheral interfaces, memory controllers) provide the basis for a complete microprocessor system on a chip, with the benefit of supporting high-speed interfaces to custom logic entities.

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